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Digital implementation flows, from RTL to GDS

In this sections you can access Digital-on-Top implementation flows (RTL to GDS). The design flows are developed to be a good starting point for projects that aim to perform complex Digital-on-Top design implementation in the High Energy Physics environment, and are constantly mantained by the CERN ASIC Support team and the designers community.

[Release notice: v2025.03-0 (March 2025)]

The design flows are separated by target technology allowing all required customization, while mantaining the shared library of procedures/flows teps in common.

The repositories that include technology specific information require a valid 3-way NDA for that specific technology. To request access or to sign the 3-way NDA, please contact asic.support@cern.ch.

Supported physical implementation design flows for Cadence tools > 21.x (Stylus-CUI - Flowkit based):

TSMC 28   TSMC 65   TSMC 130   TPSCo 65   OnSemi 180  

Legacy design flows for Cadence tools Stylus-CUI < 21.x:

TSMC 65   TSMC 130  

Legacy design flows for Cadence tools Legacy-UI < 19.x:

GF 130  

The design flows are always up-to-date with the latest Europractice EDA tools release and are based on Cadence EDA tools (Genus, Innovus, Tempus, Voltus, Quantus) and Siemens Calibre for DRC and LVS.

The design flows include:

  • A set of advanced scripts for synthesis and physical implementation specific for the design nodes and tailored to foundry and tool vendors recommendations

  • Support for radiation-tolerant designs techniques and TMR design constraints

  • Advanced sign-off procedures, power reduction techniques and multiple power domain support

  • Support for all libraries, OCVs and other foundry recommended settings

  • Support for mixed-signal OA database sharing

  • Easier configuration with YAML files and self-contained flow steps