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CERN ASIC Support and Foundry Services
Home
Foundry services
Foundry services
Technology documents & guidelines
Technology documents & guidelines
TSMC 28 nm
TSMC 28 nm
Technical documents and design manuals
PDK download and usage
Standard cell libraries reference
Radiation tolerance reports
Designer guidelines
DRC/LVS/RCX decks
Reliability rules
TSMC 65 nm
TSMC 65 nm
Technical documents and design manuals
PDK access and installation
Radiation tolerance reports
DRC/LVS/RCX decks
Total-Ionising-dose device models and libraries
TSMC 130 nm
TSMC 130 nm
Technical documents and design manuals
PDK access and installation
Radiation tolerance reports
DRC/LVS/RCX decks
GF 130 nm
GF 130 nm
TPSCo 65 nm
TPSCo 65 nm
IP blocks
IP blocks
Soft IPs
Soft IPs
Verification IPs
Verification IPs
Pin UVC
Clock generator UVC
I2C UVC
Wishbone UVC
Hit injection UVC
SEE injection UVC
TSMC 28 nm IPs
TSMC 28 nm IPs
RadTol ESD protections
RadTol CMOS IO pads
TSMC electrical fuse
Bandgap voltage reference
SRAM
SLVS TX and RX
Fast rail-to-rail opamp
TID monitoring circuit
TSMC 65 nm IPs
TSMC 65 nm IPs
RadTol ESD protections
RadTol CMOS IO pads
TSMC electrical fuse
Bandgap Voltage Reference
RadTol SRAM
High Density SRAM
TSMC 130 nm IPs
TSMC 130 nm IPs
RadTol ESD protections
RadTol CMOS IO pads
TSMC electrical fuse
Bandgap Reference Voltage with eFuse
RadTol SRAM
GF 130 nm
GF 130 nm
TPSCo 65 nm
TPSCo 65 nm
Digital design flows
Digital design flows
Supported flows
Supported flows
TSMC 28
TSMC 65
TSMC 130
OnSemi 180
common scripts
Legacy flows
Legacy flows
TSMC 65
TSMC 130
GF 130
Training
Training
28 nm Mixed-Signal Design Workshop
Verification with UVM for HEP Workshop
NDA & Export control
NDA & Export control
Contacts
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